Browsing by Subject "switch hardware"

Data centers provide a demanding and complex environment for networking as there is a need to provide fairness, throughput, and responsiveness while balancing great volumes of data and different types of flows. Programmable scheduling aims to make networking more flexible by providing capabilities for testing, modifying, and running a greater number of scheduling algorithms on switches than currently is possible. This is done by having a hardware design on top of which scheduling algorithms can be run as software. Over the years, multiple different abstractions for the switch scheduler have been suggested, with the aim of being capable of running at line rate. This thesis is a literature review of different programmable scheduler designs, focusing on Push-In First-Out, Push-In Extract-Out, Strict Priority Push-In First-Out, and Admission-In First-Out designs. This work provides an overview of the designs and their hardware implementations, observing their strengths and weaknesses regarding the data center environment. These designs are compared to one another with a focus on trade-offs between metrics like speed, expressiveness, and scalability, with a discussion on how these trade-offs ensure that there is currently no design that is above the others in all aspects.